The SX28 Microcontroller

I’m a big a fan as anyone of Microchip’s PIC series microcontrollers but there are alternatives – one candidate worth checking out is the SX28 now produced by Parallax.com (previously Scenix / Ubicom). The reason in a word, is speed! The SX28 can operate with a source clock of up to 75MHz and not only that, it can run at a rate of one instruction per clock (rather than one instruction every four clocks like the PICs) giving 75 MIPs performance.

Other good stuff:

•  Available in 28 pin DIP package, ideal for prototyping.
• 20 TTL/CMOS/Schmitt I/O pins
• 136 bytes of SRAM.
• 2K EEPROM program memory.
• Fast IRQ handling.
• Functionally very similar to the PIC16C54
• Instruction set much like the PIC range (though Ubicom use different mnemonics)
• Can use an internal RC oscillator, crystal/ceramic resonator or ext. clock drive.
• Official programming device (SX Blitz) is quite cheap, $29
• DIY programmer circuit available. (“Fluffy 2” – see link below)
• DIY programmer supported by ICprog (set hardware to “Fluffy programmer”)
• Free assembler (SASM) and simulator (SXsim) available from Parallax.com
• Good support forum
• Chips are pretty cheap, about $5 each.

There are some disadvantages: 

• Like the 16C54, it’s a bit arcane so there are those pesky memory page issues (see later)
• There’s no DATA EEPROM memory, it does have an IREAD (program memory read) instruction however.
• Older revisions of the chip had different fuse settings (all new chips will be SX28A so ignore)
• DIY programmer is based around a PIC 16F84, so you need a programmer for one of those 1st:)
• Availability of chips is a bit limited (see list of suppliers on the Parallax website)
• The datasheet / documentation have some errors in ’em (see below)
• At high speed, care needs to be taken with the timing of concurrent port accesses, especially read-modify-write instructions on the same port. Just a case of inserting some NOPs really.

Assembler: (you can download my SX28 source code template for SASM here)

As mentioned, the RISC instruction set is functionally quite similar to the PIC series, however the mnemonics are different. The big difference is that Ubicom don’t use the “,w / ,f” suffixes for “store result in W / store result in F” and the destination operand is on the left. This isn’t a big deal as there aren’t that many instructions to remember and they are often more logical anyway.

For example:

PIC:  MOVLW 3		;put literal 3 in W
SX28: MOV W,#3		;""

PIC:  INCF testreg,f	;increment "testreg"
SX28: INC testreg	;""

Example of instructions that store the result in W:

PIC:  RRF testreg,w	;rotate "testreg" right and store in W
SX28: MOV W,>>testreg	;""

PIC:  ADDWF testreg,W	;add testreg to W
SX28: ADD W,testreg	;""   ""

Example of bit manipulation instruction:

PIC:  BCF  testreg,4	;clear bit 4 of testreg
SX28: CLRB testreg.4	;"" (note the period, not comma)

The “skip instruction” method of handling conditions is pretty much the same on the PIC:

PIC:  BTFSS testreg,4	;test bit 4 and skip next instruction if set
SX28: SB testreg.4	;""                                       ""

Other things to bear in mind:

Memory pages are 512 words and you need to use the “PAGE nnn” instruction prior to jumping across page boundaries – “nnn” being the start address of the required page, eg: PAGE $200. (Note that the datasheet at one point states “use: PAGE n, n must be 0-3” this is NOT how the SASM assembler interprets the instruction, values 0 to 3 will all be interpreted as “PAGE 0”!!)

Like the 16C54, subroutine CALLS can only be to the “top” 256 words of each page ($00-$FF) and also computed GOTOs only work in that region too (any instruction with PC as the destination clears bit 8 of the the internal Program Counter – this is not made very clear in the docs!)

There are two fuse registers that need to be set when programming (You can define them up in your SASM source code and ICprog will pick them up). They cover things like:

• Whether or not the carry flag is included in addition or subtraction instructions.
• Whether a resistor is required across the oscillator pins (See setting “IFBD”)
• Turbo mode (ie: 1 instruction per clock)
• Internal input synchronization (advised for turbo mode)

The 136 bytes of SRAM data memory is split between 8 banks of 16 bytes, so you have to use the BANK command to select the bank required (or modify the bank select bits manually). The system registers $0-$7 and the following 8 user registers $8-$f are “global” and appear in all the banks.

The IREAD instruction allows you to read the 12 bit instruction words from program code area, allowing lookup tables etc. To use, set the “M” register to the memory page 0-7, and the W register to the index (0-255). Following the IREAD instruction, the M register will hold the 4 high bits of the word, and the W register holds the low 8 bits of the word. The IREAD instruction takes 4 clock cycles in turbo mode, and one cycle in compatible mode.

The PORT management bits are configured differently to the PICs. There are data direction, voltage level (CMOS/TTL), Pull-ups etc to configure – this is done with custom Op codes on the SX.

JMP instructions take 3 clock cycles in turbo mode.

Address on reset is $7ff, IRQs cause a jump to $000

Links round-up:

• Parallax – Main SX distributers/support (download “SXKey” which includes “SASM”)
• S.E.M.I.S – Fluffy2 programmer, PCB mask, layout, parts, troubleshooting.
• ICprog – Use with Fluffy2 to burn programs to SX chips