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  • RAM in the ZX Spectrum

    The Spectrum’s Upper RAM:

    Four varieties of  Upper RAM chip were originally used in the Spectrum (48K), two made by Texas Instruments and two made by OKI. All were sold as 32Kx1 devices (ie: 32,768 bits each). In actual fact these chips were intended to be 64Kx1 chips but were found to be faulty during manufacture. To avoid waste, they were sold as having half the capacity (ie: 32Kx1) with one pin needing to be set high or low to select the good “page” of addresses – both OKI and TI chips are similar in this regard – however, the two brands have different bit cell geometry which affects how they need to be accessed.

    Sinclair used jumper links to direct bus signals appropriately for the RAM chips on each board: Issue 2 boards were originally designed for TI chips only* and there is a single jumper link (to select the good page of RAM cells), whereas Issue 3 and above boards have jumpers to select TI or OKI and also for the good page of RAM cells (the part number on the chips determines the setting required). When using 32Kx1 chips, all eight must be of the same type.

    Valid jumper settings (issue2)

    • For TI chips, set the jumper link right of the ULA to “0v” (middle pad to bottom pad) for chip code ending in “3”, and to “5v” (middle pad to top pad) for chip codes ending in “4”

    * OKI RAMs were sometimes used on Issue2 boards – in such cases there will be modification to the 74LS157 multiplexor at IC26. Sometimes this was achieved with daughterboard and sometimes with a double chip socket with clipped/twisted pins.

    Valid jumper settings (issue 3+)

    • Link “TI” and also “3” or “4” (matched with the chip markings, eg: TMS4532-20NL*)
    • Link “OKI” and also “L” or “H” (matched with the chip markings, eg: OKI3732*-20RS)

     

    Using 64Kx1 chips as Upper RAM replacements:

    Because 32Kx1 type RAM chips are now very difficult to source, 64Kx1 are usually used as replacements. These have the same pin-out and operate in almost the same way as 32Kx1 chips (they can be thought of as having two good pages of 32,768 bits, it’s just that one of them is never accessed when used in the Spectrum). When using 64Kx1 chips you don’t have to worry about mixing chips or the jumper settings (1-8 chips can be used) but there is a complication regarding the chips’ refresh requirements.

    The Refresh Issue:

    The Upper RAM chips  originally used in the Spectrum have a 128-cycle refresh requirement (essentially, a counter from the CPU (its “R” Register) is used to address each row of cells in turn when the CPU is doing other things). This counter is 7-bits wide so counts from 0-127 which is fine for 32Kx1 chips which have 128 rows of 256 cells. However, some 64Kx1 chips require a 256-cycle refresh count (because they have 256 rows of 256 cells) and the Spectrum may not refresh them all correctly** (because the refresh counter only goes from 0-127). Fortunately, many 64Kx1 chips were designed to still need only 128 refresh cycles (they refresh 2 rows per cycle) and such chips will refresh correctly in all Spectrums. It will state in the chip’s datasheet what its refresh requirement is.

    ** The incompatibility manifests itself when the jumpers are set for OKI chips because of the different way the rows of cells in these chips are addressed. During refresh (and normal access) when the jumpers are set for TI chips, the “AR” pin of each RAM chip receives a fixed high or low (depending on the TI RAM variety jumper setting) so the same half of the 64K chip is refreshed as that being used to store data. However, when the jumpers are set for OKI chips the “AR” pin receives different values: During refresh, the AR pin = CPU register I(6) because the I register is placed on the upper 8 bits of the address bus at this time. The value in I is variable and may or may not match the page of RAM being used for storage. Note: This compatibility  issue may not be immediately apparent since a row of bits is also refreshed whenever that row is read by the CPU, but if it has been a while since the previous refresh, the contents will have been lost.

     

    Pin 1 on 4164 chips:

    Usually pin 1 is not connected, but on some types of 64Kx1 chip it used as a mode select. For compatibility, unconnected pin1 types should be used.

     

    RAM Speed:

    The upper RAM on the Spectrum is specified to be 150ns (faster chips will work too).

     

    A note on the Spectrum’s Lower RAM:

    The 8 chips used for the Spectrum’s lower RAM are totally different to the upper RAM. These chips are 150ns “4116” types  (there are no variations requiring jumpers) and require 3 different voltages (+5v, -5v and +12v as supplied by the Spectrum’s DC-DC converter circuit). These chips seem to be extremely sensitive to faults and often fail especially following edge connector related mishaps, usually resulting in the classic no-boot screen (wide black and white bars with random attributes or vertical lines)  This  occurs because the ROM gives up trying to boot when it detects bad lower RAM and does not clear the default contents of the lower RAM.  See my fault finding guide for more info regarding repair.